The present invention pertains to testing apparatus for integrated circuits designed to be packaged as "flip-chips or other die." More particularly, the present invention pertains to testing apparatus having a probe access region for allowing electron beams or other probe forms to access the active areas of integrated circuits.
When a complex integrated circuit such as a microprocessor is being designed, and before it is put into commercial use, it is critical to verify its design. This design verification process identifies flaws in the circuit design and often leads to performance improvements. Early in the design phase, the integrated circuit exists only as a software representation and all design verification is accomplished with software tools. Later, actual silicon integrated circuits are fabricated and subjected to direct testing. There are various methods for conducting such tests, and these will now be described.
Electron beam probing, commonly referred to as "e-beam" probing, is one such method used to identify design flaws in test dies. Die testing begins by electrically connecting the die's input/output ("I/O") pads to a tester which can provide electrical signals to some or all input pads on the die. After the die is so connected, an electron beam probes the active area of the die. The impact of the high energy electrons of the electron beam results in the emission of secondary electrons which may be detected and converted to a video image of the die active surface by standard techniques. This image is essentially a scanning electron micrograph ("SEM") of the die surface and often reveals flaws on the die surface. In addition, electron beam probing allows detectors to monitor variations in the potential energy of the secondary electrons which is proportional to the device's surface potential. As such variations can result from propagation of electronic signals through a circuit element being probed with an electron beam, the probe can determine whether a given circuit element is responding to I/O stimulus in the expected manner.
Another common debugging technique is the use of a focused ion beam ("FIB") for imaging and modification of devices. This technique employs an ion beam of a heavy element such as gallium. The ion beam is targeted on the die surface, where the impact of the heavy gallium ions causes some material removal. The simultaneous emission of secondary ions from the die surface produces an SEM-like image. Thus, FIB imaging can be used to identify manufacturing flaws in a manner analogous to electron beam probing. In addition, because the gallium ions are heavy enough to remove atoms (as opposed to merely removing electrons), FIB probing may be employed to modify the surface structure of a test die. In fact, FIB technology may be employed to perform "microsurgery" on test dies by, for example, changing a metallization pattern at some level on the test die. This allows various design modifications to be made and tested quickly without the need for generating a whole new test die each time a simple change is to be tested.
Not surprisingly, electron beam and FIB probing have become essential to the integrated circuit design procedure. The increasing popular "flip-chip" package design, however, has rendered these types of beam probing nearly impossible. The flip-chip package employs solder bumps at I/O pads on the die active surface. Thus, to make electrical contact to external circuitry, the die simply is mounted "face down" on a substrate. This feature is represented in FIGS. 1A and 1B. As shown in FIG. 1A, a flip-chip package design includes solder bumps 11 (referred to as "bump pads" herein) placed on the active surface of a die 10. In order to mount (and thereby electrically connect) the flip-chip die, as shown in FIG. 1B, the die 10 is "flipped" up-side-down onto a substrate 13 containing contacts to the solder bumps. Thereafter, the solder bumps 11 are heated until they flow and form contacts 11' as shown. Further, the die is glued onto substrate 13 by applying an epoxy material 12 to hold the die in electrical contact with the substrate. Unlike to the conventional packaging design, the active region of the die is now blocked by a packaging substrate and therefore inaccessible to a probing beam. Thus, there is a need for a new testing tool or method to perform probe beam verification of integrated circuit designs to be employed in flip-chip packages.